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URN to cite this document: urn:nbn:de:bvb:703-epub-8354-8
Title data
Bergmann, Lukas ; Bakran, Mark-M.:
Design and validation of a novel semiconductor area optimised 3300 V SiC half bridge for MMC.
In: IET Power Electronics.
Vol. 17
(2024)
Issue 7
.
- pp. 789-801.
ISSN 1755-4543
DOI der Verlagsversion: https://doi.org/10.1049/pel2.12693
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Abstract
This article presents the design and experimental validation of a novel semiconductor area optimised 3300 V half bridge with Silicon Carbide (SiC) MOSFETs for HVDC converters. Based on a loss simulation, the problem statement is provided. On this results, a mathematical derivation for the optimised semiconductor area design is executed. After this step, a system loss simulation shows the performance in efficiency and specific output power. Finally, a proof of concept was provided by a scaled hardware test setup to characterise the dynamic behaviour of the novel SiC half bridge design compared to the conventional SiC half bridge.
Further data
| Item Type: | Article in a journal |
|---|---|
| Keywords: | HVDC power convertors; MOSFET; wide band gap semiconductors |
| DDC Subjects: | 600 Technology, medicine, applied sciences > 620 Engineering |
| Institutions of the University: | Faculties > Faculty of Engineering Science > Chair Mechatronics > Chair Mechatronics - Univ.-Prof. Dr.-Ing. Mark-M. Bakran Faculties Faculties > Faculty of Engineering Science Faculties > Faculty of Engineering Science > Chair Mechatronics |
| Language: | English |
| Originates at UBT: | Yes |
| URN: | urn:nbn:de:bvb:703-epub-8354-8 |
| Date Deposited: | 25 Mar 2025 11:04 |
| Last Modified: | 04 Nov 2025 10:30 |
| URI: | https://epub.uni-bayreuth.de/id/eprint/8354 |
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