Design and validation of a novel semiconductor area optimised 3300 V SiC half bridge for MMC

Titelangaben

Bergmann, Lukas ; Bakran, Mark-M.:
Design and validation of a novel semiconductor area optimised 3300 V SiC half bridge for MMC.
In: IET Power Electronics. Bd. 17 (2024) Heft 7 . - S. 789-801.
ISSN 1755-4543
DOI der Verlagsversion: https://doi.org/10.1049/pel2.12693

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Abstract

This article presents the design and experimental validation of a novel semiconductor area optimised 3300 V half bridge with Silicon Carbide (SiC) MOSFETs for HVDC converters. Based on a loss simulation, the problem statement is provided. On this results, a mathematical derivation for the optimised semiconductor area design is executed. After this step, a system loss simulation shows the performance in efficiency and specific output power. Finally, a proof of concept was provided by a scaled hardware test setup to characterise the dynamic behaviour of the novel SiC half bridge design compared to the conventional SiC half bridge.